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Oh boy, I’ve finally reached the assignment where I get to reflect on the infamous J202 Individual Story project. I thought this day would never come. After 12 long weeks of incredibly hard work, I am so happy to say that I have completed the IS and am so proud of my work. I have to admit, while I fought this project every step of the way and claimed I never wanted to do anything like this ever again, I learned some very valuable skills and lessons from it.

Did

The skills I developed and refined in this project are ones that I most likely would never have gotten the chance to practice or learn on my own. These skills will be incredibly valuable to me in the future:

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  • interviewing skills and confidence
  • how to create an audio piece and work in natural sound
  • how to create a print layout using Adobe InDesign
  • how to make an audio slideshow
  • how to make a visually appealing and interactive website to display my work

I also learned some very valuable lessons about the journalism major and any career in communications:

  • deadlines are real, meet them no matter what lengths you have to go to
  • you have to be pushy to get the interview you want, people aren’t going to make your interviewing needs a priority over their daily life so you have to persist
  • stay organized and manage your time
  • there will be many late and tireless nights–be prepared to spend more than just a few hours on a piece
  • always carry your camera or phone with you when working on a story to capture any pictures or natural sound that might appear
  • SAVE EVERYTHING: all interviews, notes, sources, pictures, outlines…. you made need them later

I have benefitted greatly from this project and learned so much from it in such a short amount of time. As much as I like to complain about it, I’m already reflecting on it and am so thankful that I had the opportunity to do something like this.

I know I will be able to take all of these skills I have developed and apply them to my future career, and am confident I will be a leg ahead of many people my age in the communications industry that didn’t have the privilege of graduating from the Wisconsin School of Journalism and Mass Communication.

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Feel free to check out my Individual Story here!

On 03/27/2011 10:12 AM, Steve wrote:
> Hi All,
>
> I havent had the chance to drop in much, but I have been busy
> tinkering with II stuff in my spare time. Although its been at a
> snails pace, I have managed to prepare a prototype of Carte Blanche
> intended for the IIc (called CB Atto). Its a pretty tight fit and
> seems to just clear at the moment. There's still a long way to go with
> programming etc, but so far it feels like a good start and has passed
> all of its tests. I hope to see if Alex has the time to port JAT over
> to it at some point. Either way, its been an interesting experimental
> board.

Steve,

As always, you do great work!

However, (and please take this as constructive criticism) it would be very
helpful if some of that creative energy went into system documentation for the
original CB. In particular, it's very difficult for a beginner in the field
of HDL and FPGAs to get a foothold on the device. I'm sure all the details
are there, but I would love to see some more high-level discussion of the CB
architecture. For example:

- How does it map to the host bus and what would a basic interface scheme
'look' like in terms of mapping logic to the symbolic port connections?

- Maybe a raw beginner's project that does something simple like embed 6502
code in a ROM area on the FPGA and permit it to be switched in and executed
from the host.

- How does the ASIC adapter map to the FPGA? What would a 'framework' that
ties in a device on a that board look like and how are the pin connections
referenced symbolically?

A lot of that information is probably implicit in Alex's designs, the
schematics and the Xilinx databooks, but for the uninitiated the initial
learning curve is quite steep. I've been sitting here with two boards for
over a year and have not been able to negotiate it. I do have a reasonable
amount of background in logic design, but it dates strictly from the TTL 74LS*
era. There are just too many pieces that need to get sewn together at present
for me to get a foothold, and I suspect it's been daunting for some others of
us as well.

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Anyway, sorry to sound critical. Maybe it's just me that's dense :-).

Steve

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